CS1101: Laboratory 10

Adder Circuits

Academic Year 2006-2007

Lecturer: Dr. Barry O'Sullivan
Department of Computer Science
University College Cork

b.osullivan@cs.ucc.ie

Objective of this Lab

The objective of this lab is to develop two circuits which implement 4-bit adders for one's-complement and two's complement. The circuit should be implemented in TKGate and should be as simple as you can get it. If you prefer to use the built in 1-bit adder in tk-Gate in your circuit that would be fine. However, you need to show how each 1-bit adder is connected to the others.

Submission

To submit your assignment please put your designs for the required circuits in a file called Adders.v. To submit your designs, type the following from the command prompt from one of the lab machines: 
cs1101submit Adders.v

The submission deadline is 5pm on Friday 2nd of March.

Tasks

  1. Here is the truth table and a circuit for implementing a 1-bit full adder:

  2. Use this circuit as the basis for building a 4-bit adder which can do addition of two binary numbers in one's complement.
  3. Use this circuit as the basis for building a 4-bit adder which can do addition of two binary numbers in two's complement.
  4. Use your circuit to do some simple addition.

You can assume that the numbers you are adding are already in the appropriate binary format. Your final circuit should contain two circuits - one for the one's complement version, the other for the two's complement version.

b.osullivan@cs.ucc.ie

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